Tong Wu 武桐

I am a final-year PhD student in the S3 Group at the University of Manchester, supervised by Prof. Lucas C. Cordeiro and Dr. Pavlos Petoumenos. Fully funded by EPSRC and Arm Centre of Excellence. My research interests focus on formal verification and machine learning for verifying the safety of concurrent software.

Research Projects

ESBMC: A SMT-based bounded model checker for single- and multi-threaded C/C++ programs.

Wit4Java: A violation-witness validator for Java verifiers.

Publications

• [FASE 2025]ESBMC v7.7: Automating Branch Coverage Analysis Using CFG-Based Instrumentation and SMT Solving
• [TACAS 2025]ESBMC v7.7: Efficient Concurrent Software Verification with Scheduling, Incremental SMT and Partial Order Reduction
• [SAS 2024]Verifying components of Arm® Confidential Computing Architecture with ESBMC
• [ISSTA 2024]JCWIT: A Correctness-Witness Validator for Java Programs Based on Bounded Model Checking
• [TACAS 2022]Wit4Java: A Violation-Witness Validator for Java Verifiers

Links

Email | Google Scholar | GitHub | ORCID | LinkedIn